Merge pull request #165163 from armeenm/bump-x86info
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commit
27caba1c2e
1 changed files with 29 additions and 16 deletions
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@ -1,32 +1,45 @@
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{lib, stdenv, fetchurl, pciutils, python2}:
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{ lib
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, stdenv
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, fetchFromGitHub
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, pciutils
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, pkg-config
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, python3
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}:
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stdenv.mkDerivation rec {
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version = "1.30";
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pname = "x86info";
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version = "unstable-2021-08-07";
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src = fetchurl {
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url = "http://codemonkey.org.uk/projects/x86info/${pname}-${version}.tgz";
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sha256 = "0a4lzka46nabpsrg3n7akwr46q38f96zfszd73xcback1s2hjc7y";
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src = fetchFromGitHub {
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owner = "kernelslacker";
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repo = pname;
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rev = "061ea35ecb0697761b6260998fa2045b8bb0be68";
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hash = "sha256-/qWioC4dV1bQkU4SiTR8duYqoGIMIH7s8vuAXi75juo=";
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};
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preConfigure = ''
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patchShebangs .
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nativeBuildInputs = [
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pkg-config
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python3
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];
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# ignore warnings
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sed -i 's/-Werror -Wall//' Makefile
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buildInputs = [
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pciutils
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];
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postBuild = ''
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patchShebangs lsmsr/createheader.py
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make -C lsmsr
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'';
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buildInputs = [ pciutils python2 ];
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installPhase = ''
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mkdir -p $out/bin
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cp x86info lsmsr $out/bin
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cp x86info $out/bin
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cp lsmsr/lsmsr $out/bin
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'';
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meta = {
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description = "Identification utility for the x86 series of processors";
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longDescription =
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''
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longDescription = ''
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x86info will identify all Intel/AMD/Centaur/Cyrix/VIA CPUs. It leverages
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the cpuid kernel module where possible. it supports parsing model specific
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registers (MSRs) via the msr kernel module. it will approximate processor
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@ -34,7 +47,7 @@ stdenv.mkDerivation rec {
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'';
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platforms = [ "i686-linux" "x86_64-linux" ];
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license = lib.licenses.gpl2;
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homepage = "http://codemonkey.org.uk/projects/x86info/";
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maintainers = with lib.maintainers; [jcumming];
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homepage = "https://github.com/kernelslacker/x86info";
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maintainers = with lib.maintainers; [ jcumming ];
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};
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}
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