Merge pull request #165163 from armeenm/bump-x86info

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Sandro 2022-03-27 11:42:47 +02:00 committed by GitHub
commit 27caba1c2e
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@ -1,32 +1,45 @@
{lib, stdenv, fetchurl, pciutils, python2}:
{ lib
, stdenv
, fetchFromGitHub
, pciutils
, pkg-config
, python3
}:
stdenv.mkDerivation rec {
version = "1.30";
pname = "x86info";
version = "unstable-2021-08-07";
src = fetchurl {
url = "http://codemonkey.org.uk/projects/x86info/${pname}-${version}.tgz";
sha256 = "0a4lzka46nabpsrg3n7akwr46q38f96zfszd73xcback1s2hjc7y";
src = fetchFromGitHub {
owner = "kernelslacker";
repo = pname;
rev = "061ea35ecb0697761b6260998fa2045b8bb0be68";
hash = "sha256-/qWioC4dV1bQkU4SiTR8duYqoGIMIH7s8vuAXi75juo=";
};
preConfigure = ''
patchShebangs .
nativeBuildInputs = [
pkg-config
python3
];
# ignore warnings
sed -i 's/-Werror -Wall//' Makefile
buildInputs = [
pciutils
];
postBuild = ''
patchShebangs lsmsr/createheader.py
make -C lsmsr
'';
buildInputs = [ pciutils python2 ];
installPhase = ''
mkdir -p $out/bin
cp x86info lsmsr $out/bin
cp x86info $out/bin
cp lsmsr/lsmsr $out/bin
'';
meta = {
description = "Identification utility for the x86 series of processors";
longDescription =
''
longDescription = ''
x86info will identify all Intel/AMD/Centaur/Cyrix/VIA CPUs. It leverages
the cpuid kernel module where possible. it supports parsing model specific
registers (MSRs) via the msr kernel module. it will approximate processor
@ -34,7 +47,7 @@ stdenv.mkDerivation rec {
'';
platforms = [ "i686-linux" "x86_64-linux" ];
license = lib.licenses.gpl2;
homepage = "http://codemonkey.org.uk/projects/x86info/";
maintainers = with lib.maintainers; [jcumming];
homepage = "https://github.com/kernelslacker/x86info";
maintainers = with lib.maintainers; [ jcumming ];
};
}