diff --git a/pkgs/applications/science/electronics/vhd2vl/default.nix b/pkgs/applications/science/electronics/vhd2vl/default.nix
new file mode 100644
index 000000000000..43dfdcabd02f
--- /dev/null
+++ b/pkgs/applications/science/electronics/vhd2vl/default.nix
@@ -0,0 +1,39 @@
+{ stdenv
+, fetchFromGitHub
+, bison
+, flex
+, verilog
+}:
+
+stdenv.mkDerivation rec {
+  pname = "vhd2vl";
+  version = "unstable-2018-09-01";
+
+  src = fetchFromGitHub {
+    owner = "ldoolitt";
+    repo = pname;
+    rev = "37e3143395ce4e7d2f2e301e12a538caf52b983c";
+    sha256 = "17va2pil4938j8c93anhy45zzgnvq3k71a7glj02synfrsv6fs8n";
+  };
+
+  nativeBuildInputs = [
+    bison
+    flex
+  ];
+
+  buildInputs = [
+    verilog
+  ];
+
+  installPhase = ''
+    mkdir -p $out/bin
+    cp src/vhd2vl $out/bin/
+  '';
+
+  meta = with stdenv.lib; {
+    description = "VHDL to Verilog converter";
+    homepage = "https://github.com/ldoolitt/vhd2vl";
+    license = licenses.gpl2Plus;
+    maintainers = with maintainers; [ matthuszagh ];
+  };
+}
diff --git a/pkgs/top-level/all-packages.nix b/pkgs/top-level/all-packages.nix
index cfea73736d6e..6bf66bad11b5 100644
--- a/pkgs/top-level/all-packages.nix
+++ b/pkgs/top-level/all-packages.nix
@@ -7242,6 +7242,8 @@ in
 
   verilog = callPackage ../applications/science/electronics/verilog {};
 
+  vhd2vl = callPackage ../applications/science/electronics/vhd2vl { };
+
   video2midi = callPackage ../tools/audio/video2midi {
     pythonPackages = python3Packages;
   };