stdenv: add alderlake support
Signed-off-by: Haonan Chen <chn@chn.moe>
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2 changed files with 5 additions and 0 deletions
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@ -18,6 +18,7 @@ rec {
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cascadelake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "avx512" "fma" ];
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cooperlake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "avx512" "fma" ];
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tigerlake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "avx512" "fma" ];
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alderlake = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" "avx2" "fma" ];
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# x86_64 AMD
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btver1 = [ "sse3" "ssse3" "sse4_1" "sse4_2" ];
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btver2 = [ "sse3" "ssse3" "sse4_1" "sse4_2" "aes" "avx" ];
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@ -55,6 +56,8 @@ rec {
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cascadelake = [ "skylake-avx512" ] ++ inferiors.cannonlake;
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cooperlake = [ "cascadelake" ] ++ inferiors.cascadelake;
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tigerlake = [ "icelake-server" ] ++ inferiors.icelake-server;
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# CX16 does not exist on alderlake, while it does on nearly all other intel CPUs
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alderlake = [ ];
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# x86_64 AMD
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# TODO: fill this (need testing)
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@ -116,6 +116,7 @@ let
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cooperlake = versionAtLeast ccVersion "10.0";
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tigerlake = versionAtLeast ccVersion "10.0";
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knm = versionAtLeast ccVersion "8.0";
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alderlake = versionAtLeast ccVersion "12.0";
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# AMD
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znver1 = versionAtLeast ccVersion "6.0";
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znver2 = versionAtLeast ccVersion "9.0";
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@ -127,6 +128,7 @@ let
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icelake-client = versionAtLeast ccVersion "7.0";
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icelake-server = versionAtLeast ccVersion "7.0";
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knm = versionAtLeast ccVersion "7.0";
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alderlake = versionAtLeast ccVersion "16.0";
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# AMD
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znver1 = versionAtLeast ccVersion "4.0";
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znver2 = versionAtLeast ccVersion "9.0";
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